Associate Prof. Dr.-Ing. Maria Méndez Real

Personal Info

ECOLE POLYTECHNIQUE DE L’UNIVERSITE DE NANTES
IETR - UMR CNRS 6164 - ASIC team

tel : 02-40-68-30-21 (483021)
mail: maria.mendez@univ-nantes.fr

Address
Rue Christian PAUC - La Chantrerie, BP 50609
44306 Nantes Cedex 3 - FRANCE
Bureau : C 110

Short bio

Originally from Mexico, Maria Méndez Real spent one year in the United States and lives in France since 2009.
Since September 2018, Maria Méndez Real is Associate Professor (Maitre de Conférences) at Polytech Université de Nantes, France. Since 2014 she has been working in Hardware Security. Her reasearch activity is within IETR (Institut d’Electronique et des Technologies du numéRique, UMR CNRS 6164) lab. Her research interests are on side-channel attacks, fault and remote attacks, embedded systems, multi and many-core systems and protoyping tools.
From 2017 to 2018 she was an Assistant Professor (ATER) at Polytech Université de Nantes.
In 2015 she was invited researcher at the Ruhr-University of Bochum (RUB), Germany. She worked on virtual prototyping tools for evaluating multi core architectures security.
In 2017, she received her PhD, european label, in Electronic Engineering - Hardware Security from UBS (Université de Bretagne-Sud), within Lab-STICC UMR 6285 lab in France. Her PhD work was on the frame of the French ANR TSUNAMY project (2013-2017) and deal with secure-enable mechanisms for the physical isolation of sensitive applications on many-core architectures.
Before that, she received her master (Dipl.-Ing.) in Electrical and Computer from UBS in 2014.
She is author and co-author in international journals, conferences and workshops (TECS, TC, DATE, JSA, FPL, SAMOS, VLSI, etc). She is PC member and reviwer of several international journals and conferences (VLSI, JCEN, DATE, NEWCAS, FPT, TCAD, LASCAS, MCSoC, ICCS).
She is PC member of TCHES 2023, 2024.
She actively participates on national project evaluation (ANR projects, PEC, regional, etc) and jurys for recrutement of Associate Professors and PhD following and defense jurys.

Research Projects & Fundings

• CoPhyTEE: Addressing Covert & Physical Attacks performed from SW in Open-Hardware Trusted Execution Environment-enabled System-on-Chip (Laureate, Coordinator)
  2023-2027
  Funding: ANR JCJC - Jeunes Chercheuses et Jeunes Chercheurs (252KE)
  
• VAVIECA: Side-Channel Attacks vulnerabilities on FPGA Deep Neural Networks implementions (Scientific leader)
  2021-2024
  Funding: DGA through PEC (Pôle d’Excellence Cyber) (140KE)
  
• SecV: Processor obfuscation through dynamical instruction decoding
  2022-2025
  Funding: ANR PRC (736KE)
  
• SecureIoT (Laureate, scientific leader)
  2018-2021
  Funding: RFI WISE Attractivité (135KE)
• SEROIF: SEcursation des Réseaux d’Objets interconnectés et de l’information pour l’Industrie du Futur (Participant)
  2018-2021
  Funding: RFI WISE International, mobility (9KE)
• TRUST: Towards Reconfigurable and Secured Industrial IoT (Participant)
  2018-2021
  Funding: RFI WISE, mobility (10KE)
• NOPE: Normally-Off Computing (Participant)
  2019
  Funding: Cominlabs, Exploratory action
  
• Exploration of security and reliability compatibility (Scientific leader)
  2013-2017
  Funding: PEPS IETR (3,6KE)
• TSUNAMY: Hardware and software managemenT of data SecUrity iN A ManY core platform (PhD, Participant)
  2013-2017
  Funding: ANR PRC (573KE)

PhD supervision

• Owen Le-Gonidec (2023-2026), Securing TEE-enabled RISC-V Processor against Energy-based Attacks
• Alla-Eddine Bahi (2023-2026), Covert Channels on Air-Gap Computers
• Juliette Pottier (2022-2025), Cache memory Protection through Obfuscation
• Racim Boussa (2022-2025), Approximation Computing impact on Side-Channel Attacks against Deep Learning Accelerators
• May Myat Thu (2021-2024), Study of Side-Channel Vulnerabilities in Deep Learning FPGA Implementations of Computer Vision
• Safouane Noubir (2018-2021), Investigation of Security Vulnerabilities of Energy Management on Multi-Core Architectures

Other research responsabilities

• Referent of cyber security activities of IETR lab, ligerian perimeter (since 2019)
• Co-referent of Transversal Axis CYbersecurité Matérielle (CYM) of IETR lab (since 2021)
• Referent of IETR lab and INSIS institute, member of the CNRS Cybersecurity Miroir research group (since 2021)
• Referent for EEA club (since 2018)

Program Commitee member

• TCHES’24, TCHES’23, DATE’24, VLSI-Security Track, among others

CV

CV (short)

List of Publications

https://scholar.google.com/citations?hl=fr&user=5GDDjKkAAAAJ

List of open-source projects

• DVFS-based attack